Doi.org/10.1109/RFIC.2005.1489633
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Target Article[edit | edit source]
A sub-1ps/sub rms/ jitter 1-5GHz 0.13 µm CMOS PLL using a passive feedforward loop filter with noiseless resistor multiplication [frequency synthesizer application] ; Adrian Maxim M Gheorge; NULL; 06/12/2005; https://doi.org/10.1109/RFIC.2005.1489633
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